1. Technical Field
The present invention relates generally to integrated circuits and in particular to a method and apparatus for protecting functions imbedded with an integrated circuit from reverse engineering.
2. Description of the Related Art
In designing and manufacturing integrated circuits, a large amount of time, effort, and money are expended in producing integrated circuits. It is desirable to protect integrated circuits from reverse engineering in view of the expenditures in designing and manufacturing integrated circuits. Reverse engineering an integrated circuit includes removing the package surrounding the integrated circuit and probing the integrated circuit to identify functions provided by the integrated circuit. One known method for protecting integrated circuits from reverse engineering includes incorporating misleading warning labels on the integrated circuit itself. This method, however, wastes valuable real estate area. Additionally, such a labeling method does not deter a detailed examination of the integrated circuit. Another known method of preventing reverse engineering includes using packaging materials that destroy the chip during a decapping operation in which the surrounding package is removed to examine the integrated circuit. Such a packaging technique is expensive. Yet another known method for preventing reverse engineering includes placing a metalization blanket layer over the core of the integrated circuit to prevent voltage contrast scanning electron microscopy (SEM) from determining the patterns generated within the integrated circuit. The use of a metalization blanket layer, however, wastes a layer of metal interconnect and requires additional processing. Therefore, it would be advantageous to have a method and apparatus for preventing reverse engineering that does not waste valuable real estate area on an integrated circuit, does not require expensive packaging techniques, and does not require additional processing.